Kioxia, SanDisk show off the tiny chip which could go in world's first 1 PB SSD
3D flash memory increases density 60%
by https://www.techradar.com/uk/author/christian-cawley · TechRadarNews By Christian Cawley Published 14 August 2026
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- Quad-Level-Cell (QLC) 3D flash memory sets the industry benchmark for performance, bit density, and power efficiency
- It is the first QLC 3D flash to reach a 4.8 GB/s interface, ensuring super-fast data transfer between storage and processor
- This is the breakthrough that could deliver 1 PB (petabyte) storage to data centers
SanDisk has unveiled the chip that could revolutionize data centers and push cloud storage and AI to the next level with its QLC 3D flash memory technology, developed with Kioxia. Employing the companies’ CMOS directly Bonded to Array (CBA) technology, the 10th generation Quad-Level-Cell 3D flash memory has set a new industry standard, representing the baseline for competing memory manufacturers.
The chip has a 60% increase in bit density compared to the 8th generation 3D flash memory, also setting the benchmark for performance and power efficiency.
With a 37 Gb/mm² (gigabits per square millimeter) density, the QLC 3D flash can be used to assemble the first 1 petabyte (that’s 1,000 terabytes) solid-state drives for data center servers.
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Wafer bonding
The CMOS directly Bonded to Array technology, in which CMOS wafers are bonded with cell array wafers after separate manufacturing, is at the heart of the QLC 3D flash memory development. Using “high-precision wafer-to-wafer alignment,” the new chips are the first to hit a 4.8 Gb/s interface (under test conditions) using the QLD 3D technology.
The die capacity and packaging density for a potential 1 PB SSD based on the QLC 3D flash memory are not practical (both in cost and space) for home systems but can be adapted for ultra-dense 1U and 2U rack servers in modern purpose-built data centers.
The size of the chips makes other uses impractical and requires advanced 3D packaging in 64- or 128- die stacks to hit the 1 PB SSD target, using the ruler-like, 318 mm long EDSFF E1.L and E3.L form factor PCBs, as well as the recently defined E2 form factor (measuring 200 mm x 76 mm). This was specifically designed to handle 1 PB drives.
Next-generation infrastructure
The march towards implementing AI across the connected world requires increasingly sophisticated storage so that agent-based, physical AI, and generative AI can be efficiently delivered. A chip that is dense enough to deliver a 1 PB SSD is key to this next step.
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